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KONDO ELECTRONICS INDUSTRY CO.,LTD.

KEIm-CVSoC Product Information

Product Appearance

SoM Layout

SoM Dimensions

Specifications

SoC FPGA

Cyclone® V SoC FPGA
Mfr. #:5CSXFC5C6U23I7N
Hard Processor SystemARM® Cortex™ -A9 MPCore™ HPS
Logic Elements / ALMs85kLEs / 32,057ALMs
M10K memory3,970kbits / 397blocks
MLAB memory480kbits
DSP blocks87
18 × 18 multipliers174
PLLs(HPS)3
PLLs(FPGA)6
Transceiver count(3.125Gbps)6

Memory

DDR3L SDRAM(HPS)2GByte, Bus width 32bit
MT41K512M16VRN-107 IT (Micron) × 2
QSPI Flash(HPS)64MByte
MT25QL512ABB8E 12-0SIT(Micron)
QSPI Flash(FPGA)32MByte, for configuration
MT25QL256ABA8E12-1SIT(Micron)

Clock

For HPS25MHz
For FPGA50MHz, 100MHz

Peripheral

RTCDS1339U-33 + (Maxim), External battery
EEPROM24LC32A-I/ST(Microchip), 32bit

Connectors

168Pin B to B connector × 2
Mfr. #:FX10A-168S-SV(HRS)
HPS IOEthernet(RGMII)×1, USB OTG(ULPI)×1,
SPIM×1, UART×1, I2C×1, QSPI×1,
SDMMC×1, GPIO×21
FPGA IOMaximum 133
TransceiverT×6 lanes, R×6 lanes
JTAG I/FHPS-FPGA Daisy Chain
Debugging is possible using the Intel® FPGA Download Cable II (sold separately).
Power supply+3.3V±5%(3.135〜3.465V),VCCIO(3.3V or 2.5V)
Power consumptionTBD
Operating temperatureTBD
Dimensions55×43mm

Design Example

※ The configuration inside the FPGA or SoC FPGA differs depending on the design.
The figure is a standard configuration example.

Development Environment

KEIm-CVSoC Development kit

SoMKEIm-CVSoC
Camera inputOV5642 Camera module
Video outputDVI output, mini HDMI connector
Ethernet10/100 / 1000Base-T, RJ45 connector
USB 2.0High Speed, OTG, USB Micro-AB Connector
UARTUSB serial, USB Micro-B connector
M.2 slotIEI Mustang-M2BM-MX2 (sold separately)
can be connected.
Debug I/FIntel® FPGA Download Cable II (sold separately) can be connected.
Power supplySupplied from the attached AC adapter.
AccessoriesAC adapter, USB Micro-B Cable

Download Documents

You can download the following documents.

  • KEIm-CVSoC Hardware Manual
  • KEIm-CVSoC Development Kit Startup Manual
  • KEIm-CVSoC Reference Designs